IEEE

Efficient Ternary Logic Circuits Optimized by Ternary Arithmetic Algorithms

Abstract: Multi-valued logic (MVL) circuits, especially the ternary logic circuits, have attracted great attention in recent years due to their higher information ...
IEEE

A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network

Abstract: In this paper, we present a 10T SRAM compute-in memory (CiM) macro to process the multiplication-accumulation (MAC) operations between ternary-inputs and binary-weights. In the proposed 10T ...