output reg [100-1 : 0] src0_data, // ST_DATA_W=100 output reg [6-1 : 0] src0_channel, // ST_CHANNEL_W=6 ...

output reg [100-1 : 0] src0_data, // ST_DATA_W=100 output reg [6-1 : 0] src0_channel, // ST_CHANNEL_W=6 output reg [100-1 : 0] src1_data, // ST_DATA_W=100 output reg ...

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